The invention relates to a semiconductor device having a rectifying junction, in particular on a switching diode, comprising a semiconductor body including a substrate and a first silicon semiconductor region of a first conductivity type having a high doping concentration, and a second silicon semiconductor region of a second conductivity type, which is opposite to the first conductivity type, and having a low doping concentration and a thickness which is greater than that of the first semiconductor region, said rectifying junction being situated between the first semiconductor region and the second semiconductor region, the first semiconductor region including a sub-region containing a mixed crystal of silicon and germanium, and said first and said second semiconductor region being provided with, respectively, a first and a second connection conductor. The invention also relates to a method of manufacturing such a device.
Such a device is known from United States patent specification U.S. Pat. No. 5,342,805, published on Aug. 30, 1994. Said document discloses (see, for example, FIG. 3) a diode having a semiconductor body which comprises, in succession, an n-type silicon substrate with a high doping concentration, an n-type epitaxial silicon layer, which is provided thereon and which has a relatively low doping concentration, at the surface of which there is a layer of a p-type silicon having a high doping concentration, which is formed by diffusion. At the location where the diffused region and the epitaxial layer, which form, respectively, a first and a second semiconductor region, border on each other, there is a rectifying pn-junction. The substrate forms an n+ region. Consequently, the device forms a p+n(n+) diode. Since both the p+ region and the n+ region are relatively thick, the profile of the charge carriers in both regions is relatively flat. As a result, diffusion currents of electrons (in the p+ region) and of holes (in the n+ region) are negligibly small. The current in such a diode is dominated by recombination of electrons and holes, and the current density is equal to the ratio between the overall amount of charge carriers per unit area in the n-type region and the effective service life of the charge carriers. When the diode is switched from the forward direction to the reverse direction, a depletion region has to build up, particularly in the n-type region, which involves the removal of holes. Switching typically takes place at a constant reverse current (density). In this case, the time necessary to switch off (t) the diode is proportional to the charge stored in the n-type region. If the charge carriers have a long service life, then the stored charge is large. As a result, the diode is slow. The service life of charge carriers can be reduced by introducing gold or platinum into the semiconductor body, resulting in a faster diode. In the known device, the first semiconductor region comprises, instead of or in addition to gold, a sub-region including a mixed crystal of silicon and 20% germanium, which has a thickness of 1 to 2 xcexcm. Such a sub-region introduces a mechanical stress into the device (the mixed crystal has a lattice constant which differs from that of the rest of the device) which is so large that stress relaxation occurs, causing so-called misfit dislocations. These dislocations reduce (in the same manner as gold atoms) the service life of the (minority) charge carriers. This too results in a faster diode. The known diode has a switching time (t) of, for example, 25 nsec.
A drawback of the known device is that, although it is very fast, it is still not fast enough for specific applications, particularly for use as a switching diode for high voltages and/or high powers.
Therefore, it is an object of the invention to provide a device of the type mentioned in the opening paragraph, which has a very slow switching time, and to provide a simple method of manufacturing such a device.
To achieve this, a device of the type mentioned in the opening paragraph is characterized in accordance with the invention in that the entire first semiconductor region contains a mixed crystal of silicon and germanium, and the germanium content and the thickness of the first semiconductor region are selected so that the mechanical stress built up in the semiconductor device is smaller than or equal to the stress at which misfit dislocations are formed. It has surprisingly been found that such a diode has a much shorter switching time than the known diode. The invention is based on the following recognitions. By limiting the mechanical stress in the device by choosing a sufficiently low germanium content and/or a sufficiently small thickness of the germanium-containing layer, stress relaxation involving misfit dislocations does not occur. However, in this case the band gap of the mixed crystal of silicon and germanium is substantially smaller, not only much smaller than the band gap of silicon but also much smaller than the band gap of a relaxed mixed crystal of silicon and germanium. As a result, the concentration of minority charge carriers in the first semiconductor region, i.e. in the case of p+n diode electrons, is substantially increased. The reason for this being that the product of the concentration of minority charge carriers and the concentration of majority charge carriers, i.e. in this case the p-type doping concentration, is inversely exponentially dependent upon the band gap. Since the electron concentration in the vicinity of the connection conductor of the first semiconductor region is substantially zero, the increase of the electron concentration in the first semiconductor region causes a substantially increased electron-concentration gradient in said region. As a result, in the first (p+ type) semiconductor region, the contribution of the electron-injection current to the overall current increases and may even exceed the recombination current in the second (n-type) semiconductor region. As a result, the switching time of the diode decreases. To achieve said increase of the electron concentration it is necessary, however, that the first semiconductor region is substantially entirely made of the silicon-germanium-containing material. As mentioned hereinabove, misfit dislocations are avoided by keeping the stress in the silicon-germanium region at a sufficiently low level. This is achieved by choosing the relative deviation of the lattice constant of the mixed crystal with respect to the lattice constant of the rest of the semiconductor body and/or the thickness of the silicon-germanium-containing region to be sufficiently small. Said deviation in lattice constant is directly proportional to the germanium content. The generally relatively small thickness of the first semiconductor region, which is necessary to avoid the development of misfit dislocations, has a surprising additional advantage: as a result of the small thickness of the first semiconductor region, also the gradient in the electron concentration in this region is additionally increased. This enhances the above-explained effect on the diffusion current and the recombination current. All this results in a device having a surprisingly short switching time of, for example, 3 to 9 nsec. A further important advantage of a device in accordance with the invention is that, by virtue of the absence of (misfit) dislocations, a relatively small leakage current (in the reverse direction) is achieved. The device further exhibits a relatively small voltage drop in the forward direction.
In a preferred embodiment of a device in accordance with the invention, the germanium content and the thickness of the first semiconductor region are selected so that the product of the thickness of the first semiconductor region and the relative deviation of the lattice constant of the first semiconductor region with respect to the substrate is smaller than or equal to 40 nm*percent, and preferably smaller than or equal to 30 nm*percent. It has been experimentally found that under such conditions, no or hardly any misfit dislocations occur. A further favorable consequence of the absence of misfit dislocations is that the reliability of a device in accordance with the invention is increased. This can be attributed to the fact that dislocations may give rise to degradation of the current-voltage characteristics. A germanium content of 100% means that the relative deviation of the lattice constant of the first semiconductor region with respect to a silicon substrate amounts to 4%. For a semiconductor region having a germanium content of X atom percent, X ranging between 0 and 100, the above-mentioned relative deviation is 0.X*4%.
Favorable results can be achieved with a germanium content of the first semiconductor region in the range between 10 and 30%. In this case, the maximum permissible thickness is determined by the above-discussed condition for avoiding the development of misfit dislocations. In principle, there is no lower limit to the thickness of the first semiconductor region. A very thin first semiconductor region may have the disadvantage that a fatal interaction may readily occur between the metal used for the connection conductor of the first semiconductor region and the rectifying junction. In a favorable modification, a third semiconductor region of the first conductivity type is situated between the first semiconductor region and the second semiconductor region, the thickness and doping concentration of said third semiconductor region being between the thickness and doping concentration of the first and the second semiconductor regions. In this case, the rectifying junction is formed between the second and the third semiconductor region having a thickness ranging, for example, from 0.1 to 1 xcexcm. The third semiconductor region generally is much thinner than the second semiconductor region. By virtue thereof, the risk that an interaction takes place between the connection conductor of the first semiconductor region and the rectifying junction is very small, also when the first semiconductor region is very thin.
Preferably, the surface area of the diode, i.e. the region where the two semiconductor regions contact each other, is at least 10,000 xcexcm2, and preferably 1 to 4 mm2. Such, relatively large diodes are particularly suitable for use as switching diodes for high powers. Also, the measures in accordance with the invention are particularly necessary in such a large diode, since relaxation of an excess of stress will occur sooner in such a large diode than in a (much) smaller diode. In view of the above-mentioned application(s), the thickness and the doping concentration of the second semiconductor region are preferably selected so that the breakdown voltage of the device is in the range from 50 to 1000 V. Further, the thickness and the doping concentration of the first semiconductor region are preferably selected so that, during operation of the device, the first semiconductor region is not completely depleted at the breakdown voltage. As a result, an increase of the leakage current, which may be caused by the contact between the depletion region and the connection conductor of the first semiconductor region, is avoided.
In a variant of a device in accordance with the invention, the first semiconductor region is periodically interrupted in the lateral direction, and there is a further semiconductor region of the first conductivity type at the location of said interruptions (27 in FIG. 3), which further semiconductor region has a high doping concentration and contains exclusively silicon. In such a device, the resistance of the rectifying pn-junction between the first and the second semiconductor region is reduced by a further pn-junction between the further semiconductor region and the second semiconductor region. As a result, this variant can very suitably be used for switching very high powers. In a further favorable variant, the device comprises metal atoms, preferably gold or platinum atoms. Also these metal atoms contribute to increasing the speed of the device in accordance with the invention. This variant is very suitable for devices having a very high breakdown voltage (for example 600 V). In that case, the thickness of the first semiconductor region must be very large, so that the charge stored therein is also very large. Consequently, an additional measure, aimed at increasing the speed of the device, is desirable. However, also in this case, a device in accordance with the invention has a relatively small leakage current, because the concentration of metal atoms in a device in accordance with the invention can be relatively low.
The semiconductor regions in a device in accordance with the invention are preferably embodied so as to be epitaxial layers. The substrate is preferably a heavily doped silicon substrate of the second conductivity type. If desirable, an additional epitaxial layer may be present between the second, slightly doped semiconductor region and the substrate, which additional epitaxial layer is of the same conductivity type as the second semiconductor region (and the substrate) but has a higher doping concentration.
A method of manufacturing a semiconductor device having a rectifying junction, in which method a semiconductor body is formed which comprises a substrate and a first silicon semiconductor region of a first conductivity type having a high doping concentration, and a second silicon semiconductor region of a second conductivity type, opposed to the first conductivity type, having a low doping concentration and a thickness which is much greater than that of the first semiconductor region, the rectifying junction being formed between the first semiconductor region and the second semiconductor region, and a sub-region containing a mixed crystal of silicon and germanium being formed in the first semiconductor region, and said first and said second semiconductor region being provided with, respectively, a first and a second connection conductor, characterized in accordance with the invention in that the entire first semiconductor region is embodied so as to be a mixed crystal of silicon and germanium, and the germanium content and the thickness of the first semiconductor region are selected so that the stress built up in the semiconductor device remains below a level at which misfit dislocations develop. Such a method enables devices in accordance with the invention to be obtained in a simple manner. Preferably, the thickness and the germanium content of the first semiconductor region are selected so that the product of the thickness of the first semiconductor region and the relative deviation of the lattice constant of the first semiconductor region with respect to the substrate is smaller than or equal to 40 nm*percent, and preferably smaller than or equal to 30 nm*percent. The semiconductor regions are preferably formed by means of epitaxy.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.